module alu_top_tb ();
  
  reg [7:0] in1,in2;
  
  reg [2:0] alu_con;

  wire zero;
  
  wire [7:0] result;
  
  alu_top U1(in1,in2,alu_con,zero,result);
 
  // initial #200 $finish;
    initial begin
    in1=8'b00001111;  
    in2=8'b00001111; 
    alu_con=3'b000;
        
//    forever #10 clk=~clk; 
    end 
    
    initial begin    
    #20;
    
    alu_con=3'b000; #20;
   
    alu_con=3'b001; #20;
   
    alu_con=3'b010; #20;
   
    alu_con=3'b110; #20;
   
    alu_con=3'b111; #20;
   
    in1=8'b00011111; in2=8'b00001111; alu_con=3'b000; #20;
    
    alu_con=3'b001; #20;
    
    alu_con=3'b010; #20;

    alu_con=3'b110; #20;
  
    alu_con=3'b111; #20;
    
    in2=8'b00011111; in1=8'b00001111; alu_con=3'b000; #20;
    
    alu_con=3'b001; #20;
    
    alu_con=3'b010; #20;

    alu_con=3'b110; #20;
  
    alu_con=3'b111; #20;
                
    $stop;
  end

  endmodule
    

